Papilio Learning

• Papilio Quick Start - Install basic Papilio software and load a bit file.
• ZAP IDE Quick Start - Run sketches on the AVR8 and ZPUino Soft Processors.
• Xilinx ISE Quick Start - Setup the tools to write your own VHDL or Verilog.
  • 64bit Windows 8 Bug - This bug prevents you from loading license file during install.

• Papilio Quick Start - Install basic Papilio software and load a bit file.
• Papilio Pins - Learn about the Papilio WingSlot scheme.
• Papilio QuickStart Sketch - Learn from the Quick Start sketch that ships with the Papilio.

ZPUino Soft Processor

• ZPUino User Guide - Learn about the ZPUino Soft Processor.
• ZAP IDE Quick Start - Run sketches on the AVR8 and ZPUino Soft Processors.
• VGA Introduction - Learn how to use the VGA Papilio Wishbone Peripheral to output graphics.
• VGA Liquid Crystal Demo - See how to convert LiquidCrystal LCD sketches to VGA!

AVR8 Soft Processor

• ZAP IDE Quick Start - Run sketches on the AVR8 and ZPUino Soft Processors.
• AVR8 Shifty Variant - Learn how to move pins on the fly with the AVR8 Shifty variant.
• Custom AVR8 Soft Processor - Make a custom AVR8 with just the functionality you need.
• AVR8 Custom User Core - Make your own peripheral core in VHDL or Verilog to run in the AVR8.
• Simulate AVR8 - Use simulation to debug your custom user core or to learn about the AVR8 internals.
• Run Arduino Sketches - See how to run sketches and move the Arduino core SPI pins on the fly.
• Run Bascom BASIC Code - Run Bascom BASIC code on the AVR8 soft processor.
• Working with Arduino Core - Make a simple change to the Arduino core in order to move a PWM pin with VHDL.

VHDL

• Papilio VHDL eBook - Free VHDL eBook written for the Papilio and LogicStart MegaWing.
• Free Range VHDL - Free VHDL eBook written by Bryan Mealy and Fabrizio Tappero.
• Xilinx ISE Quick Start - Setup the tools to write your own VHDL or Verilog.
  • 64bit Windows 8 Bug - This bug prevents you from loading license file during install.

UART

• High Speed UART - Use a Xilinx reference design to implement high speed (3Mb/s) serial communications.

Logic Analyzer

• Debug Internal FPGA Logic - Learn how to debug digital logic running inside of the Papilio's FPGA.
• Analyze Remote Control - Analyze IR data sent by an infrared remote control with the "Sump" Logic Analyzer.

Clocks

• Digital Clock Manager - Create clocks with custom speeds between 2Mhz and 250Mhz.