The playground is an area where anyone can contribute code, examples, documentation, or just pictures of the Papilio in action. Anything Papilio or FPGA related is welcome.
The playground is a publicly editable wiki and we encourage anyone to add or edit content, the password is "gadget". To edit any page scroll to the very bottom of the page and select "Edit Page". There are instructions for wiki markup at the bottom. The password to upload images is also "gadget".
Links to interesting FPGA projects
Recommended reading for getting started with VHDL.
These books are targeted for "Synthesis" of VHDL on physical hardware instead of VHDL for simulation. It is important to make sure you are learning VHDL for Synthesis otherwise it gets confusing. These books have been reported as the "breakthrough" books that helped people get over the initial learning curve.
Further Reading about FPGA's
Misc Reading related to FPGA and Digital Logic
|College course material||College course material from Eric Crabill at Xilinx. This is excellent information that covers Digital Electronics and FPGA's.|
|VHDL Tutorial||VHDL Tutorial written by Alvaro Lopes of the ZPUino project. (Work in progress)|
|VHDL Tutorial||VHDL Learn by Example tutorial.|
|VHDL Tutorial||In detail tutorial for beginners.|
|VHDL Tutorial||Design tips, examples and tutorials for beginners and advanced users.|
|VHDL Tutorial||Includes section on processor design.|
- The ZPUino is a 32-bit Zylin ZPU processor that runs at 100Mhz. It has been designed to work with the Arduino IDE and the Papilio.
- Forum post with C code to generate VHD code that can load hex file to program memory in the AVR8.
- Forum post that helps to make sense about how hex files are loaded into the AVR8.
|boldport flow||Build environment generator for FPGA projects|
|Wavedrom||Tool to make timing diagrams.|
|Pin Converter||Tool for re-arranging, generating, and verifying Xilinx UCF files. Also includes support for placing wings when generating the UCF.|