Wing Bus Proposal

Definition

We have Wings and we have cores but we need something to tie the two together.

The Wing Bus will allow users to tell a core which Wing slot an associated Wing is connected to.

Each core will have a register to define which wing slot a wing is connected to. This register can be defined at run time by writing to its address or at design time by setting the generic.

There will also be a register that sets the direction of each of the 8 pins in the wing slot. This can also be set at design or runtime. Multiple cores can be connected to the same wing slot by setting the unused pins to inputs. If there is a core that only uses two pins, like a uart, that needs to be connected along with another small core, like irda. Both cores can be connected to the same wing slot by setting the overlapping pins to inputs. Setting pins to inputs allows the pin to be driven by a different output.

For smaller cores that only use a couple of the 8 pins there will also be an optional register that allows you to define which of the 8 pins a function is connected to. For example for SPI, you would set a register for the TCK pin that would let you control which of the 8 pins of the Wing Bus core it is connected to.

Usage

  • The Wing bus cores can be connected to soft processors such as the AVR8.
  • We will develop a serial port Wing bus framework. The Wing bus cores will connect to a serial port controller. Users can write applications that connect to the serial port and read and write the addresses of the cores to control them.
  • We will provide a standalone VHDL implementation that uses a FSM/counter to perform control functions.
  

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